Applying the Ideal Testing Framework to HDL Programs

dc.contributor.authorKilincceker O.
dc.contributor.authorTurk E.
dc.contributor.authorChallenger M.
dc.contributor.authorBelli F.
dc.date.accessioned2021-05-03T20:48:10Z
dc.date.available2021-05-03T20:48:10Z
dc.date.issued2018
dc.descriptionGesellschaft fur Informatik e.V. (GI);Informationstechnische Gesellschaft im VDE (ITG)en_US
dc.description31st GI/ITG International Conference on Architecture of Computing Systems, ARCS 2018 -- 9 April 2018 through 12 April 2018 -- -- 164575en_US
dc.description.abstractThis paper proposes a framework for testing behavioral model of sequential circuits implemented in Hardware Description Language (HDL). The concept of Ideal Testing is applied for achieving reliability and validity of both positive and negative testing. The HDL program is first modeled by a Finite State Machine (FSM) which is then converted to a Regular Expression (RE). This RE is used to construct test sequences. For positive testing, the original (fault-free) FSM model is used, while for negative testing its mutant model(s) are used to define requirements of ideal testing in conjunction with model-based and code-based mutation testing. A demonstrating example based on a real-life-like Traffic Light Controller (TLC) validates the proposed approach and analyzes its characteristic features. © ARCS 2018.en_US
dc.identifier.endpage36en_US
dc.identifier.isbn9783800745593
dc.identifier.scopus2-s2.0-85052528973en_US
dc.identifier.scopusqualityN/Aen_US
dc.identifier.startpage31en_US
dc.identifier.urihttps://hdl.handle.net/11454/70776
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherVDE Verlag GmbHen_US
dc.relation.ispartofARCS 2018 - 31st GI/ITG International Conference on Architecture of Computing Systems, Workshop Proceedingsen_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectBehavioral Modelen_US
dc.subjectHardware Description Languageen_US
dc.subjectIdeal Testingen_US
dc.subjectMutation Testingen_US
dc.subjectRegular Expressionen_US
dc.subjectTest Generationen_US
dc.subjectTraffic Light Controlleren_US
dc.titleApplying the Ideal Testing Framework to HDL Programsen_US
dc.typeConference Objecten_US

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