Applying the Ideal Testing Framework to HDL Programs
dc.contributor.author | Kilincceker O. | |
dc.contributor.author | Turk E. | |
dc.contributor.author | Challenger M. | |
dc.contributor.author | Belli F. | |
dc.date.accessioned | 2021-05-03T20:48:10Z | |
dc.date.available | 2021-05-03T20:48:10Z | |
dc.date.issued | 2018 | |
dc.description | Gesellschaft fur Informatik e.V. (GI);Informationstechnische Gesellschaft im VDE (ITG) | en_US |
dc.description | 31st GI/ITG International Conference on Architecture of Computing Systems, ARCS 2018 -- 9 April 2018 through 12 April 2018 -- -- 164575 | en_US |
dc.description.abstract | This paper proposes a framework for testing behavioral model of sequential circuits implemented in Hardware Description Language (HDL). The concept of Ideal Testing is applied for achieving reliability and validity of both positive and negative testing. The HDL program is first modeled by a Finite State Machine (FSM) which is then converted to a Regular Expression (RE). This RE is used to construct test sequences. For positive testing, the original (fault-free) FSM model is used, while for negative testing its mutant model(s) are used to define requirements of ideal testing in conjunction with model-based and code-based mutation testing. A demonstrating example based on a real-life-like Traffic Light Controller (TLC) validates the proposed approach and analyzes its characteristic features. © ARCS 2018. | en_US |
dc.identifier.endpage | 36 | en_US |
dc.identifier.isbn | 9783800745593 | |
dc.identifier.scopus | 2-s2.0-85052528973 | en_US |
dc.identifier.scopusquality | N/A | en_US |
dc.identifier.startpage | 31 | en_US |
dc.identifier.uri | https://hdl.handle.net/11454/70776 | |
dc.indekslendigikaynak | Scopus | en_US |
dc.language.iso | en | en_US |
dc.publisher | VDE Verlag GmbH | en_US |
dc.relation.ispartof | ARCS 2018 - 31st GI/ITG International Conference on Architecture of Computing Systems, Workshop Proceedings | en_US |
dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Behavioral Model | en_US |
dc.subject | Hardware Description Language | en_US |
dc.subject | Ideal Testing | en_US |
dc.subject | Mutation Testing | en_US |
dc.subject | Regular Expression | en_US |
dc.subject | Test Generation | en_US |
dc.subject | Traffic Light Controller | en_US |
dc.title | Applying the Ideal Testing Framework to HDL Programs | en_US |
dc.type | Conference Object | en_US |